Current implementations of (IF) up-conversion circuitry used in communication equipment for digitally formatted baseband signals customarily employ multiple frequency conversion (local oscillator/mixer) stages, in order to realize a desired IF analog output signal, to be supplied to the RF transmitter. The front end of such IF up-conversion circuitry, to which the digital baseband signals are applied, is typically configured as shown in FIG. 1 to include an up-conversion section 10, the output of which is filtered in a pre-compensation filter 20 at the input to a digital-to-analog converter (DAC) 30.
The initial up-conversion section 10 includes a quadrature interpolation filter 11 to which respective in-phase (I) and quadrature phase (Q) components of the digitally sampled baseband signal are applied. To conform with Nyquist-based standards, the sampling frequency fs of the interpolation filter 11 is greater than twice (e.g., on the order of two and one-half times) the highest frequency of the up-converted frequency of interest. The respective I and Q components of the interpolated baseband signal are then multiplied in respective mixers 12 and 13 by an IF local oscillator signal 14, and the resulting up-converted I and Q components are then summed in summing unit 15. The output of summing unit 15 is a real signal S, respective time and frequency domain representations of the signal S are shown in FIGS. 2 and 3, which is applied to the pre-compensation filter 20.
The pre-compensation filter 20 is operative to compensate for roll off in the main lobe of a (sinc(x)) frequency domain distortion function, diagrammatically illustrated in FIG. 4, to which the frequency content of the signal S is subjected by the DAC 30. (FIG. 5 shows the time domain representation of the ideal impulse response of the DAC 30.) Since a sinc(x) function has very shallow roll-off at frequencies below fs/2 (the interpolated Nyquist frequency), the roll-off in the main lobe is normally very minor. As it is converted into analog format by the DAC 30, the sampled time response of the signal S shown in FIG. 2 is convolved with the DAC's time domain response of FIG. 5, so that the output of the DAC 30 has a resultant time domain characteristic shown in FIG. 6.
As diagrammatically illustrated in FIG. 7, which is the frequency domain representation of the convolved DAC output of FIG. 6, the output of the DAC 30 effectively contains an infinite number of sidelobe-resident `replicas` or `images` of the frequency content of the sampled baseband signal shown in FIG. 2. These spectral replicas or images are mirrored or folded symmetrically above and below respective (center) frequencies that are integral multiples of fs/2 and multiplied by the sinc(x) frequency domain response function of the DAC, shown in FIG. 4.
This resultant output of the DAC 30 is lowpass filtered by a (smoothing) lowpass filter 40, to produce an analog baseband signal, shown in FIG. 8. Since, as noted above, the pre-compensation filter 20 is operative to compensate for roll-off in the main lobe of the (sinc(x)) frequency domain distortion function of FIG. 4, the combination of the pre-compensation filter 20 prior to the DAC 30 with the low pass filter 40 at the output of DAC is effective to remove all of the unwanted spectral replicas of the baseband beyond the fundamental or main lobe frequency response of the lowpass filtered analog signal, as shown in FIG. 9.
Now although the original baseband digital signal is now in analog format, this analog signal is still not at the intended IF frequency. As a consequence, it is necessary to perform up-conversion of the converted analog baseband signal to the IF frequency of interest by means of a further analog IF unit 50, to which the output of the DAC 30 is coupled via an amplifier 45. Similar to up-converter section 10, analog IF unit 50 includes a local oscillator 51, the output of which is multiplied in a mixer 52 by the analog baseband signal output by lowpass filter 40, and coupled to an IF bandpass filter 55 from which the IF output signal is derived. Undesirably, each of these additional components adds to the amount of hardware required for up-conversion and therefore increases the cost of the up-converter.